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低功率单路反相器SN74AUP1G04


介绍

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figures 1 and 2).
This single inverter gate performs the Boolean function Y = A.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.

特性

• Available in the Texas Instruments
NanoStar and NanoFree Packages
• Low Static-Power Consumption;
 ICC = 0.9-µA Max
• Low Dynamic-Power Consumption;
Cpd = 4.1 pF Typ at 3.3 V
• Low Input Capacitance; Ci = 1.5 pF Typ
• Low Noise − Overshoot and Undershoot
<10% of VCC
• Ioff Supports Partial-Power-Down Mode
Operation
• Input Hysteresis Allows Slow Input
Transition and Better Switching Noise
Immunity at the Input
(Vhys = 250 mV Typ at 3.3 V)
• Wide Operating VCC Range of 0.8 V to 3.6 V
• Optimized for 3.3-V Operation
• 3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
• tpd = 3.9 ns Max at 3.3 V
• Suitable for Point-to-Point Applications
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Performance Tested Per JESD 22
• 2000-V Human-Body Model
(A114-B, Class II)
• 200-V Machine Model (A115-A)
• 1000-V Charged-Device Model (C101)
• ESD Protection Exceeds ±5000 V With
Human-Body Model

生产厂商:TEXAS INSTRUMENTS
 
datasheet:
SN74AUP1G04.pdf
下载: pdf 文件

 

 
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