These high speed Quad 2-to-1 Line data selector/Multiplex-
ers utilize advanced silicon-gate CMOS technology. They
possess the high noise immunity and low power consump-
tion of standard CMOS integrated circuits, as well as the
ability to drive 10 LS-TTL loads.
These devices each consist of four 2-input digital multiplex-
ers with common select and STROBE inputs. On the
MM54HC157/MM74HC157, when the STROBE input is at
logical ``0'' the four outputs assume the values as selected
from the inputs. When the STROBE input is at a logical ``1''
the outputs assume logical ``0''. The MM54HC158/
MM74HC158 operates in the same manner, except that its
outputs are inverted. Select decoding is done internally re-
sulting in a single select input only. If enabled, the select
input determines whether the A or B inputs get routed to
their corresponding Y outputs.
The 54HC/74HC logic family is functionally as well as pin-
out compatible with the standard 54LS/74LS logic family.
All inputs are protected from damage due to static dis-
charge by internal diode clamps to VCC and ground.
• Typical propagation delay: 14 ns data to any output
• Wide power supply range: 2±6V
• Low power supply quiescent current: 80 mA maximum
• Fan-out of 10 LS-TTL loads
• Low input current: 1 mA maximum
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