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NAND+LPDRAM H9DA4GH4JJAMCR-4Gb+4Gb\1.8V+1.8V


特性
[ MCP ]
● Operation Temperature
- -30oC ~ 85oC
● Packcage
- 137-ball FBGA - 10.5x13.0mm2, 1.2t, 0.8mm pitch
- Lead & Halogen Free
[ NAND Flash ]
● Multiplane Architecture
● Supply Voltage
- Vcc = 1.7 - 1.95 V
● Memory Cell Array
- (1K + 32) words x 64 pages x 4096 blocks
● Page Size
- (1K+ 32 spare) Words
● Block Size
- (64K + 2K spare) Words
● Page Read / Program
- Random access : 25us (max.)
- Sequential access : 45ns (min.)
- Page program time : 250us (typ.)
- Multi-page program time (2 pages) : 250us (typ.)
● COPY BACK PROGRAM
- Automatic block download without latency time
● FAST BLOCK ERASE
- Block erase time: 3.5ms (typ.)
- Multi-block erase time (2 blocks) : 3.5ms (typ.)
● CACHE READ
- Internal (2048 + 64) Byte buffer to improve the read
throughtput.
● STATUS REGISTER
- Normal Status Register (Read/Program/Erase)
- Extended Status Register (EDC)
● BLOCK PROTECTION
- To Protect Block against Write/Erase
● HARDWARE DATA PROTECTION
- Program/Erase locked during Power transitions.
● DATA RETENTION
- 100,000 Program / Erase cycles (with 1bit /528Byte ECC)
- 10 Year Data retention
[ DDR SDRAM ]
● Double Data Rate architecture
- two data transfer per clock cycle
● x32 bus width
● Supply Voltage
- VDD / VDDQ = 1.7 - 1.95 V
● Memory Cell Array
- 16Mb x 4Bank x 32 I/O x 2 Die
● Bidirectional data strobe (DQS)
● Input data mask signal (DQM)
● Input Clock
- Differential Clock Inputs (CK, /CK)
● MRS, EMRS
- JEDEC Standard guaranteed
● CAS Latency
- Programmable CAS latency 2 or 3 supported
● Burst Length
- Programmable burst length 2 / 4 / 8 with both sequential
and interleave mode

生产厂商:Hynix

datasheet:
H9DA4GH4JJAMCR_Series_(Rev1.1).pdf
下载: pdf 文件 
 

 

 


 
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