This 4-to-1 line multiplexer utilizes advanced silicon-gate
CMOS technology. It has the low power consumption and
high noise immunity of standard CMOS integrated circuits.
This device is fully buffered, allowing it to drive 10 LS-TTL
loads. Information on the data inputs of each multiplexer is
selected by the address on the A and B inputs, and is pre-
sented on the Y outputs. Each multiplexer possesses a
strobe input which enables it when taken to a low logic lev-
el. When a high logic level is applied to a strobe input, the
output of its associated multiplexer is taken low.
The 54HC/74HC logic family is functionally and pinout com-
patible with the standard 54LS/74LS logic family. All inputs
are protected from damage due to static discharge by inter-
nal diode clamps to VCC and ground.
• Typical propagation delay: 24 ns
• Wide power supply range: 2V±6V
• Low quiescent current: 80 mA maximum (74HC Series)
• Low input current: 1 mA maximum
• Fanout of 10 LS-TTL loads