特性：

PRODUCT DESCRIPTION
The GSD3tw provides industry-leading GPS performance
in a cost-saving, host-based implementation. Host-based
GPS involves a GPS tracker engine combined with
SiRFNavIIITM software running on the host system. By
sharing the host system’s memory and CPU resources,
total BOM cost and parts count is reduced. GSD3tw is
ideally suited for applications that require tighter
integration of the GPS function into a powerful CPU and
RTOS at minimal cost and space.
PRODUCT HIGHLIGHTS
Industry Leading GPS Performance for Host-Based Systems
High Performance Solution
􀁘 Fast Time to First Fix (TTFF)
􀁘 Up to 20 channel operation
􀁘 3GPP and E911 compliant
Low Power (Typical)
􀁘 24 mW TricklePowerTM
􀁘 45 mW full power tracking when external LDOs used
􀁘 67 mW full power tracking when internal LDOs used
􀁘 Typical hibernate current 10 μA
Tiny Solution Size
􀁘 WLCSP solution 3.2 x 3.15 x 0.61 mm, 0.4 mm ball
pitch
􀁘 Total solution <30 mm2 with shared resources
􀁘 BGA option 4.5 x 4.0 x 0.68 mm, 0.5 mm ball pitch
Simple To Use
􀁘 Host library portable to many popular processors
􀁘 Host loading 4 MIPS or less with host FPU and
5 MIPS without host FPU. This is the average load on
the host processor.
ARCHITECTURE HIGHLIGHTS
Tiny Single Die GNSS Satellite Signal Processor
Advanced Single Die
􀁘 Leading edge 90 nm process
􀁘 Fully integrated GPS RF, LNA and digital
􀁘 Operation from single 1.8 V supply
􀁘 Fully integrated 1.2 V LDOs
Leading Edge Tracker Architecture
􀁘 Premium SiRFstarIIITM architecture
􀁘 200,000+ effective correlators for fast TTFF and
high sensitivity
􀁘 Optimized for integration with host resources
􀁘 System designed to minimize host real-time loading
Next Generation GPS Navigation Engine
􀁘 High performance SiRFstarIII architecture
􀁘 ROM-based for small size and low power
􀁘 Compliant with 3GPP TS25.171
Optimized for High Volume Applications
􀁘 Minimal external BOM
􀁘 Advanced factory test modes

生产厂商：

CSR \ SiRF

datasheet:
GSD3tw_CS-106191-DS-1.pdf
下载: pdf 文件