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eMMC+LPDDR H9DP32A4JJMCGR-4GB+4Gb\1.8V\2.8V+1.8V


介绍

4GB eMMC + 4Gb LowPower DDR

特性

[ e-NAND Flash ]
● Packaged NAND flash memory with
MultiMediaCard interface
● High capacity memory access
● eMMC/MultiMediaCard system specification,
compliant with V4.41
● Full backward compatibility with previous
MultiMediaCard system specification
● Bus mode
- High-speed MultiMediaCard protocol.
- Three different data bus widths:
1 bit, 4 bits,8 bits.
- Data transfer rate: up to 104Mbyte/s
- DDR mode supported
● Operating voltage range:
- VCCQ = 1.7~1.95V/2.7V~3.6V
- VCC = 3.3V
● Error free memory access
- Internal error correction code
- Internal enhanced data management
algorithm (wear levelling, bad block
management, garbage collection)
- Possibility for the host to make sudden
power failure safe-update operations for
data content
● Security
- Password protection of data
- Security Erase
- Security Trim
- Secure bad block management
- Built-in write protection
● Boot
- Simple boot sequence method
● Power saving
- Enhanced power saving method by
introducing sleep functionality
● Partition management with enhanced storage.
● Hardware reset supported

[ DDR SDRAM ]
● Double Data Rate architecture
- two data transfer per clock cycle
● x32 bus width
● Supply Voltage
- VDD / VDDQ = 1.7 - 1.95 V
● Memory Cell Array
- 16Mb x 4Bank x 32 I/O x 2 Die
● Bidirectional data strobe (DQS)
● Input data mask signal (DQM)
● Input Clock
- Differential Clock Inputs (CK, /CK)
● MRS, EMRS
- JEDEC Standard guaranteed
● CAS Latency
- Programmable CAS latency 2 or 3 supported
● Burst Length
- Programmable burst length 2 / 4 / 8 with both sequen
tial and interleave mode

生产厂商:Hynix

datasheet:
H9DP32A4JJMCGR_Series_(Rev0.1).pdf
下载: pdf 文件 
 


 
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