This decoder utilizes advanced silicon-gate CMOS technol-
ogy, and is well suited to memory address decoding or data
routing applications. It possesses high noise immunity, and
low power consumption of CMOS with speeds similar to low
power Schottky TTL circuits.
The MM54HC154/MM74HC154 have 4 binary select inputs
(A, B, C, and D). If the device is enabled these inputs deter-
mine which one of the 16 normally high outputs will go low.
Two active low enables (G1 and G2) are provided to ease
cascading of decoders with little or no external logic.
Each output can drive 10 low power Schottky TTL equiva-
lent loads, and is functionally and pin equivalent to the
54LS154/74LS154. All inputs are protected from damage
due to static discharge by diodes to VCC and ground.
• Typical propagation delay: 21 ns
• Power supply quiescent current: 80 mA (74HC)
• Wide power supply voltage range: 2±6V
• Low input current: 1 mA maximum
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